What can we do to attract more people to donate?

Demonstrate a working and high performance FPGA prototype of the full planned ASIC.

Oh, and do away with:
* the login wall. Sounds a bit ridiculous when you are supposed to do open source.
* extensive moderation. It's better to delete an occasional offensive message or user account than slow down all communications.

Make public your estimations of target chip prices,
take better and worse cases of NRE and chip production volumes,
make short list of chip features and compare them and prices with "mainstream SoCs",
remember high volume discounts vs. flat prices,
talk about possible alternatives to the first basic chip ...
You want to sell the idea so you have to talk about
the benefits against off-the-shelf products.
Best regards
Vit Mares

I think Vit has it right.

Before donating, I would be interested in seeing a clear breakdown of the design plan and costs for the whole project. What peripherals will be included? On-chip SRAM? Cache size? Secondary cache size for external SDRAM? What process node do you wish to target? What power consumption and frequency target? What software tools need to be purchased to design and verify or will these be donated? How many test fabrication runs will be budgeted for? What are costs for mask creation? How much does it cost for a run of X units after mask fabrication? What is the estimated yield and how will testing be accomplished? What about packaging? How many units will be produced? Also, will people who donate receive samples from the fabrication run?

For devices that are not power constrained, an FPGA implementation would likely be less expensive though it can potentially run only up to 50% of the final ASIC speed. If the final design isn't targeted properly, it may be substandard to a competing ARM/MIPS/MeP/H8/SH4/etc chip yet only somewhat superior to an FPGA version of OpenRISC. This is a very narrow window to build en-masse for.

I'd like to see the OR gain popularity as a processor since companies that sell processor IP tend to be very....protective....of their code. However, the OR needs, I feel, a clearer target and a firm estimate of costs before I can donate to a community supported fabrication run.

Hope this helps!

J.

Allot of feedback that we received from the community when we redesigned the OpenCores website was that the download statistics was ridiculously poor and something even fake (automatic scripts that was downloading the same project 24/7). There was also allot of problems with spam in the "old days". The registrations was needed to fix these serious problems and to be able to provide more detailed statistics. We are now getting allot of positive feedback about the improved statistics and there is a demand for even more details.
However in order to try and please all members in the community, we are currently looking into creating two registration flow, one minimal that do not allow you to see any statistics since these users are not contributing to statistics. And one normal registration which full access to statistics.

But we highly doubt that this is the main reason why anyone would not join the OpenRISC-ASIC project.

We agree that it would be great if we could provide hard-facts for all these questions, but the problem is that all these parameters are strongly related to what ASIC-process we select. To provide answers to your question for all combinations would create a large matrix of different ASIC solutions with different design-features, costs, lead-time, minimum order quantities, system performance, power consumption, annual volumes. Putting together this complete matrix requires allot of work and time.
A suggestion would be to maybe select two solutions, one based on a cheaper ASIC-technology-solution (with less features and system performance etc), and one with more advance (more expensive) ASIC-technology-solution. How does this sound?



This all depends on what ASIC technology we can afford and what features we want to include, remember that we together, meaning the whole OpenCores community (125.000 HW & SW engineers) should have a fairly good idea what features are needed :-)
If this is of interest we can setup a web survey so that all OC users can define their "dream" OpenRISC SoC features.!?
If we can find/define the "common base" of needed features, then we should be able to cover the majority of users applications and should therefore have good chance to getting volumes. We can of course not make a "all-in-one" ASIC that covers all application corners, that will be a to large design (=expensive).

Our wish and goal is to be able to develop a OpenRISC ASIC (for example the proposed design) that could reach 150-200MHz with a target price at $5.



We are also talking to multiple ASIC companies that are interested to sponsor this project, but I think that our first set would be to see and try to get more donations, both from different community members and also commercial companies. We have been working hard to try and spread that word and make sure that people understand the concept, but I think that we together can achieve so much more if we all help out with this task. And if this means that we need to create some additional documentation etc, then we need to do that.


Thanks for your questions and feedback, please continue to be active and share your ideas/suggestions. We encourage more users to join this discussion...

Sounds good. It will at least give a baseline to understand what can be achieved.

1) A full featured integrated software suite (similar or better than Xilinx ISE) would attract lots of new users of the core. People often neglect this aspect, but from my experience, there is lot of power with 'integrated' tool set compared to a set of dis-integrated tools.

2) Providing dedicated support for people who donate might attract new ones.

3) Technical Consultancy for start ups would attract new users.

Above points are based on my personnel experiences. I am highly motivated to start my own product company with a product base ranging from simple mp3 players to sophisticated video processors. However certain things stops me from going forward. The biggest thing used to be the lack of open source IP cores. Thanks to OpenCores that problem is solved.
Next comes the effort i need to put to build something out of the IP cores. It appears that OpenCores lacks in this respect. Although there are lots of IP cores available, including 32 bit processor, it takes huge amount of effort to build something on top of it. For example, building an OpenRisc based system and running Linux on top of it seemed to be difficult (at leasts some time back) due to lack of tools and documentation. However if proper effort is put the overhead can be reduced drastically. This will enable users to get started and have something functional at lesser time.

Perfect! This is the best way to present project goals.

True that. My own personal experience is solely with MOSIS (USA) and VDEC (Japan) test runs of 5-20 chips. Since a test fabrication is necessary to verify the GDSII, at least TSMC (and maybe IBM) will direct us to MOSIS or a similar service initially. IBM is fairly supportive of open source software so their semiconductor branch may be open to an at-cost production run (a manufacturing donation may be a bit too much to hope for, though I suppose we should ask first). I suspect there is not too much difference in performance between similar technology process nodes between manufacturers so if we decide a performance target first, we could estimate which process is appropriate.



Absolutely. A 0.18um process run at 100-150MHz and a 65nm process run at 600-700MHz would work well. Of course....money. ;-)



I just assumed the ORPSoC project base. A survey of desired features would shed more light on what is needed though so it might be good to try.



Probably a 0.18um to 0.35um process node is best (though 0.35 is pushing the speed capability and 0.18 is pushing price). Maybe the MOSIS SCMOS_SUBM might be appropriate because one design targets multiple tech nodes on TSMC with a single GDSII file.



There are a few other questions as well...when the GDSII file is developed and verified in silicon, what happens with it? Is it released as a GPLed hard core to the community? The rules on redistribution of licensed standard cells and I/O pads are pretty strict. Will the standard cells and I/O pads be developed and characterized from scratch? Blackbox cells and pads which are substituted by the foundry might be possible though analog parasitic extraction will be meaningless. Also, will people who donate receive sample chips to test from the first batch?

As it is, it looks like there is enough money for a test run of around 5-10 chips on a lower end process if you use free or donated design tools. The next step would be testing, then mass production. Thoughts?

J.

This is a bit off-topic, but it has come up here.

Why not leave it up to the project maintainer as to whether anonymous download from their project's repository is allowed? If they really care about statistics they will enable that and be able to see exactly which users are downloading their IP.

My opinion is that what is most important is getting people to give feedback and participate in testing and development - not a number of downloads or hits on a page. A login wall, in my opinion, detracts from the number of people who would take the first few steps of getting involved. For example, those that are interested in a cursory examination and evaluation of the code are likely to never do the checkout if they have to go through the whole registration process. It's also a fairly uncommon practice in the world of open source hosting, as far as I can tell.

However, if project maintainers feel they really want the stats, why not leave it up to them to remove anonymous read access from their project's repository?

A captcha could be used as an alternative for the users not logged in.
I also feel that the login requirement could be a bit stressing.

For funding, I see the following options:
- Kindly ask every user to donate 1$, there are 122876 users registered, so, if half of them will donate, there will be 50,000 $
- Turn the attention towards open source software community which is better established and I think that they could help with some donations .. after all OpenRISC can run Linux (a performance comparison with ARM processors would be useful)
- Try to get the research and education community implied, the students might be receptive to the open source hardware idea, and even a 1$ donation, might become signifiant if there are many donators
- Try asking other open source projects which are exposed to a very big number of users to run a donation add on behalf of OpenRISC (for example, Wikipedia might accept to display an add in the sections related to processors or kernel.org, or sourceforge.net)

Also, the technology offering the best cost/performance should be evaluated and set as a target.
Having an open source processor ASIC is indeed a great idea, but it's success depends on the ability to compete with proprietary ASICs.

Another idea might be to get funding from EU ( http://erc.europa.eu/ ) or some national research institutes, as this is also a research project.

How expensive would be to add a FPGA-like reconfigurable area to the ASIC ?
A PRU (programmable realtime unit) unit (similar to what TI has) would also broaden the usage spectrum, and I don't think that it introduces a big area cost.

Regarding the delay introduced by the moderation of the posts, it might be a good option to let the posts be approved by default, and have a button which could be used by users to report the inappropriate content.

I think that a good first step would be to feature the project more prominently on the OpenCores site. While there's a box saying "Funding - OpenRISC ASIC" on the front page, it actually took me a while to notice it (mainly because I rarely go to that page or look at its content). I think it would be better to feature the OpenRISC ASIC prominently on all pages (possibly with a banner) and even more so on all relevant pages, such as the OpenRISC page and the OpenRISC platform page at ORSoC. It's mentioned at the latter in the news on the right, but it should be prominent.

The OpenRISC ASIC should be advertised such that anyone who comes to the OpenCores site or checks out anything about OpenRISC would become aware of it.

The step after that would be, as discussed, providing more information. It might also help if that took some pages off standard marketing, such as comparison tables with competing products, to show how the OpenRISC ASIC will provide better features at a better price point (and be realistic, it will also help determine where to drive the product). Convince people it's worth it, and they may be willing to donate. Personally I'm not that convinced myself yet, I only donated a small sum because I like the idea.